Chapter 4. API Guides
STAGE_INC –Increment stage count register
Syntax STAGE_INC Value
Operands
• Value –8 bits value
Cycles 2 cycles to execute, 4 cycles to fetch next instruction
Description The instruction increments stage count register by given value.
Examples:
1: STAGE_INC 10 // stage_cnt += 10
2: // Up counting loop example:
STAGE_RST // set stage_cnt to 0
label: STAGE_INC 1 // stage_cnt++
NOP // do something
JUMPS label, 16, LT // jump to label if stage_cnt < 16
STAGE_DEC –Decrement stage count register
Syntax STAGE_DEC Value
Operands
• Value –8 bits value
Cycles 2 cycles to execute, 4 cycles to fetch next instruction
Description The instruction decrements stage count register by given value.
Examples:
1: STAGE_DEC 10 // stage_cnt -= 10;
2: // Down counting loop exaple
STAGE_RST // set stage_cnt to 0
STAGE_INC 16 // increment stage_cnt to 16
label: STAGE_DEC 1 // stage_cnt--;
NOP // do something
JUMPS label, 0, GT // jump to label if stage_cnt > 0
HALT –End the program
Syntax HALT
Operands No operands
Cycles 2 cycles to execute
Description The instruction halts the ULP coprocessor and restarts ULP wakeup timer, if it is enabled.
Examples:
1: HALT // Halt the coprocessor
WAKE –Wake up the chip
Syntax WAKE
Operands No operands
Cycles 2 cycles to execute, 4 cycles to fetch next instruction
Description The instruction sends an interrupt from ULP to RTC controller.
• If the SoC is in deep sleep mode, and ULP wakeup is enabled, this causes the SoC to wake up.
• If the SoC is not in deep sleep mode, and ULP interrupt bit (RTC_CNTL_ULP_CP_INT_ENA) is set
in RTC_CNTL_INT_ENA_REG register, RTC interrupt will be triggered.
Espressif Systems 1488
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