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Espressif ESP32-S2 User Manual

Espressif ESP32-S2
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Chapter 2. API Reference
Fig. 22: Bit layout of single filter mode (Right side MSBit)
illustrates how the 32-bit acceptance code and mask will be interpreted under Dual Filter Mode (Note: The yellow
and blue fields represent standard and extended frame formats respectively).
Fig. 23: Bit layout of dual filter mode (Right side MSBit)
Disabling TX Queue The TX queue can be disabled during configuration by setting the tx_queue_len member
of twai_general_config_t to 0. This will allow applications that do not require message transmission to save
a small amount of memory when using the TWAI driver.
Placing ISR into IRAM The TWAI drivers ISR (Interrupt Service Routine) can be placed into IRAM so that
the ISR can still run whilst the cache is disabled. Placing the ISR into IRAM may be necessary to maintain the TWAI
drivers functionality during lengthy cache disabling operations (such as SPI Flash writes, OTA updates etc). Whilst
the cache is disabled, the ISR will continue to:
Read received messages from the RX buffer and place them into the drivers RX queue.
Load messages pending transmission from the drivers TX queue and write them into the TX buffer.
To place the TWAI drivers ISR, users must do the following:
Enable the CONFIG_TWAI_ISR_IN_IRAM option using idf.py menuconfig.
When calling twai_driver_install(), the intr_flags member of twai_general_config_t
should set the ESP_INTR_FLAG_IRAM set.
Note: When the CONFIG_TWAI_ISR_IN_IRAM option is enabled, the TWAI driver will no longer log any alerts
(i.e., the TWAI_ALERT_AND_LOG flag will not have any effect).
Driver Operation
The TWAI driver is designed with distinct states and strict rules regarding the functions or conditions that trigger a
state transition. The following diagram illustrates the various states and their transitions.
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Espressif ESP32-S2 Specifications

General IconGeneral
BrandEspressif
ModelESP32-S2
CategorySingle board computers
LanguageEnglish