Chapter 2. API Reference
• address: Beginning flash address to read
• len: Length request to read
• align_addr: Output of the aligned address to read
• page_size: Physical page size of the flash chip
uint32_t (*host_status)(spi_flash_host_inst_t *host)
Check the host status, 0:busy, 1:idle, 2:suspended.
esp_err_t (*configure_host_io_mode)(spi_flash_host_inst_t *host, uint32_t command,
uint32_t addr_bitlen, int dummy_bitlen_base,
esp_flash_io_mode_t io_mode)
Configure the host to work at different read mode. Responsible to compensate the timing and set IO
mode.
void (*poll_cmd_done)(spi_flash_host_inst_t *host)
Internal use, poll the HW until the last operation is done.
esp_err_t (*flush_cache)(spi_flash_host_inst_t *host, uint32_t addr, uint32_t size)
For some host (SPI1), they are shared with a cache. When the data is modified, the cache needs to be
flushed. Left NULL if not supported.
void (*check_suspend)(spi_flash_host_inst_t *host)
Suspend check erase/program operation, reserved for ESP32-C3 and ESP32-S3 spi flash ROM IMPL.
void (*resume)(spi_flash_host_inst_t *host)
Resume flash from suspend manually
void (*suspend)(spi_flash_host_inst_t *host)
Set flash in suspend status manually
esp_err_t (*sus_setup)(spi_flash_host_inst_t *host, const spi_flash_sus_cmd_conf *sus_conf)
Suspend feature setup for setting cmd and status register mask.
Macros
SPI_FLASH_TRANS_FLAG_CMD16
Send command of 16 bits.
SPI_FLASH_TRANS_FLAG_IGNORE_BASEIO
Not applying the basic io mode configuration for this transaction.
SPI_FLASH_TRANS_FLAG_BYTE_SWAP
Used for DTR mode, to swap the bytes of a pair of rising/falling edge.
ESP_FLASH_SPEED_MIN
Lowest speed supported by the driver, currently 5 MHz.
SPI_FLASH_CONFIG_CONF_BITS
OR the io_mode with this mask, to enable the dummy output feature or replace the first several dummy bits
into address to meet the requirements of conf bits. (Used in DIO/QIO/OIO mode)
SPI_FLASH_OPI_FLAG
A flag for flash work in opi mode, the io mode below are opi, above are SPI/QSPI mode. DO NOT use this
value in any API.
SPI_FLASH_READ_MODE_MIN
Slowest io mode supported by ESP32, currently SlowRd.
Type Definitions
typedef struct spi_flash_host_driver_s spi_flash_host_driver_t
Enumerations
enum esp_flash_speed_t
SPI flash clock speed values, always refer to them by the enum rather than the actual value (more speed may
be appended into the list).
Espressif Systems 755
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