TROUBLESHOOTING AND REPAIR
FREQUENCY SYNTHESIS
SUB-SYNTHESIZER VCO (A3) CIRCUIT DESCRIPTION 6C-11.
The A3 Sub-Synthesizer VCO PCA is controlled by the A4 Sub-Synthesizer PCA and
produces a signal that is further processed in the A12 Sum Loop PCA. This assembly
includes a varactor tuned oscillator that generates frequencies from 160 to 320 MHz,
along with low-pass filters and an ECL divide-by-ten circuit.
Ql is configured as an oscillator, with a tunable resonant circuit connected between
base and collector that provides positive feedback. This circuit includes printed
transmission lines, varactor diodes CR1-CR4, and inductor L1. The frequency tuning
voltage at J1-4 is applied to the varactor diodes through RF choke L2, and tunes the
oscillator over the range of 160-320 MHz with voltages from about 2V to 22V.
The oscillator transistor output signal at Q1 emitter is next applied to Q2, configured
as a common-base stage that provides isolation. The 0 dBm output of Q2 is applied to
monolithic amplifier U1, which boosts the signal level to +13 dBm at its output.
Two switched low-pass filters, including PIN diodes CR5-CR8 and capacitors
C13-C22, follow U1 and provide harmonic suppression. Comparator U4 senses the
tuning voltage, VT, and enables the low band filter between CR5 and CR6 for VT less
than 7.5V, and enables the high band filter between CR7 and CR8 for VT greater than
7.5V. The switching voltage, 7.5V, corresponds to about 230 MHz.
The filtered signal is next applied to resistive splitter R13-R17. One output drives
monolithic amplifier U2, which provides isolation and boosts the signal to about +7
dBm. This signal connects to the A4 Sub-Synthesizer PCA by a through-the-plate
coaxial connector at P1. The other splitter output drives ECL frequency divider U3,
which is configured to divide by ten. The divided output signal from U3 is filtered by a
five-element low-pass filter (L5, L6, C27-C29), and connects to the A12 Sum Loop
PCA at J2 by a coaxial cable. This signal ranges in frequency from 16 to 32 MHz.
SUB-SYNTHESIZER VCO TROUBLESHOOTING 6C-12.
A problem in the Sub-Synthesizer VCO can cause uncal status response 242
(Sub-Synthesizer unlock) and can also cause self-test failure 324. To test the VCO
independent of the Sub-Synthesizer PCA, a voltage source, such as a lab power supply,
can be connected to the phase lock port at J1 pin 4. This will override the voltage
supplied by the Sub-Synthesizer PCA and won't cause damage. Vary the phase lock
voltage from 2 to 23V, and observe the signal at connector J2 on a spectrum analyzer.
The frequency should vary from about 16 to 32 MHz, and the level should be about +2
dBm. If the signal is not as described, the VCO is likely faulty. As a first step in
troubleshooting, remove the plug-on jumper that connects TP1 and TP2, and install it
to connect TP1 to TP3. This bypasses divider U3, and connects the fundamental
oscillator signal to J2. This signal should vary from about 160 to 320 MHz at about +3
dBm over the tuning range. If this signal is faulty, the circuit prior to U3 is faulty.
Remember to replace the plug-on jumper in its original position after troubleshooting.
DC voltages can be readily measured at various nodes in the circuit, and may help to
isolate the faulty circuit. Table 6C-2 lists expected approximate DC voltages at various
circuit nodes, as an aid to troubleshooting.
6C-16
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