gefran VDI100 Series

The following gure an overview of the automatic speed regulator (ASR) block.
V/f+PGcontrolmode:
The ASR function adjusts the output frequency to control the motor speed to minimize the difference between
the frequency reference and actual motor speed.
Figure4.4.107ASRblockdiagram(V/f+PG)
Frequency
Reference
Speed
Feedback
SFS
Fref
20-00
20-02
+
-
+
20-05
20-06
ASR Limit
20-07=1(during accel / decel)
. 20-07= 0 , or
. Speed control integral reset
(03-00 to 03-07= 43)
PG valid
PG invalid
(03-00 to 03-07= 42)
f
+
+
Fout
Output
Frequency
I
+
20-01
20-03
P
If one of the multi-function input (03-00 to 03-07) is set to 42 (PG is disabled), the input can be used to enable
or disable the speed control loop system (ASR).
SLV control mode:
The ASR function adjusts the output frequency to control the motor speed to minimize the difference between
the frequency reference and actual motor speed.
The ASR controller in SLV mode uses a speed estimator to estimate the motor speed. In order to reduce speed
feedback signal interference, a low-pass lter and speed feedback compensator can be enabled.
The ASR integrator output can be disabled or limited. The ASR output is passed through a low-pass lter.
Figure4.4.108ASRblockdiagram(SLVmode)
20-00
20-02
20-01
20-03
20-08
Frequency
Reference
20-13
20-14
20-17
20-18
Speed
Observer
20-09
20-11
20-10
20-12
Motor Voltage
Motor Current
P
P
I
I
I Limit
Speed
Observer
Feedback
Speed
Feedback
Compensator
LP Filter
Observer
Error
20-07 = 1 (during accel/decel)
20-07 = 0
Speed Control Integral Reset
03-00 to 03-07 = 43
Primary
delay time
Torque
Limit
Torque
Reference
+
+
+
+
+
-
SV control mode and PMSV mode:
The ASR function adjusts the output frequency to control the motor speed to minimize the difference between
the frequency reference and actual motor speed.
The ASR controller in SLV mode uses a speed estimator to estimate the motor speed. In order to reduce speed
feedback signal interference, a low-pass lter and speed feedback compensator can be enabled.
The ASR integrator output can be disabled or limited. The ASR output is passed through a low-pass lter.
VDI100 • Instruction manual 263