High Speed I/O
Synchronous modes synchronize the reset (or set) to the selected quadrature input and the selected marker
polarity. Figure 11.1 below indicates which mode to select based on the markers timing diagram. Consult the doc-
umentation provided with your encoder to determine the marker pulse timing.
NOTE: The Marker input is sampled within 50μs of the associated quadrature edge. It is left to the user to determine
if this meets the time constraints of the measured drive.
NOTE: If the Marker input pulse consecutively spans more than one of the specified edges, quadrature-decoding
operation is unpredictable.
*While not displayed in this figure, modes for low level (inverse logic) are also supported for each state.
The accumulator is reset to zero on the specified edge if rotation is clockwise (as shown in figure above). However,
if rotation is reversed, the accumulator is alternately set to Counts per rev – 1 on that same physical edge. When dir-
ection is reversed, that same physical edge is seen (by the internal decoder) as having the opposite edge polarity
as shown below.
Page 88 of 163
To Next Page