Evaluation Board Manual
PPC750FX Evaluation Board Preliminary
Switches
Page 42 of 115
750FXebm_ch6.fm
June 10, 2003
6.5 System Controller Initialization
Two 8-position DIP switches at location U17 and U24 provide initilization settings for the system controller.
Table 6-6. System Controller Initilization—U17
Switch No. Signal Default Setting Description (0 = ON = closed, 1 = OFF = open)
1DEV_AD0 ON
ON = MV64360 Serial ROM initialization disabled
OFF = MV64360 Serial ROM initialization enabled
2:3 DEV_AD2:DEV_AD3 ON:ON
Specifies the two least significant bits of the 7 bit IIC address of the Serial
ROM the MV64360 can use for initialization.
ON:ON = address 0b1010000 (Serial EEPROM U36)
ON:OFF = reserved
OFF:ON = address 0b1010001 (Serial EEPROM U55)
OFF:OFF = reserved
4DEV_AD5 OFF
ON = MV64360 register base address is 0x14000000
OFF = MV64360 register base address is 0xF1000000
5DEV_AD8 OFF
ON = MV64360 CPU Pads Calibration Disabled
OFF = MV64360 CPU Pads Calibration Enabled
6DEV_AD15 ON
ON = boot from 8 bit socketed Flash BOOTSMALL_N
OFF = boot from 32 bit Flash
7DEV_AD16 OFF
ON = MV64360 PCI retry disabled
OFF = MV64360 PCI retry enabled
8DEV_AD18 OFF
ON = DDR-SDRAM clock is running at a higher frequency than the
MV64360 core clock
OFF = DDR-SDRAM clock is running at the same frequency as the
MV64360 core clock
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