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Evaluation Board Manual

PPC750FX Evaluation Board Preliminary

Tables

Page 8 of 115

750FXebmLOT.fm

June 10, 2003

Table 10-7. PCI Connector Signals—J25 ..................................................................................................59

Table 10-8. CPLD JTAG Connector—J26 .................................................................................................62

Table 10-9. Serial Port Connector Signals—J13, both ports .....................................................................63

Table 10-10. System Controller Device Address Signals—J14 ...................................................................64

Table 10-11. Memory Control Signals—J15 ................................................................................................66

Table 10-12. External Clock Input Signal—U39 ..........................................................................................68

Table 10-13. Test Connections ....................................................................................................................69

Table 11-1. Section Contents ....................................................................................................................73

Table 11-2. CPLD I/O Pin List ...................................................................................................................73

Table 11-3. CPLD Logic Descriptions ........................................................................................................76

Table 11-4. Maximum Clock Frequency ....................................................................................................94

Table 11-5. Clock-to-Output Time .............................................................................................................94

Table 11-6. Pin-to-Pin Signal Delay ...........................................................................................................96

Table 11-7. Setup and Hold Time ............................................................................................................100

Table 12-1. Section Contents ..................................................................................................................101

Table 12-2. Component Placement Data Description .............................................................................102

Table 12-3. Debugging Tools ..................................................................................................................104

Table 12-4. Auxiliary Materials in Kit .......................................................................................................104

Table 12-5. Evaluation Board Bill of Materials .........................................................................................106

IBM PPC750FX User Manual

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