Evaluation Board Manual
PPC750FX Evaluation Board Preliminary
CPLD Programming
Page 82 of 115
750FXebm_ch11.fm
June 10, 2003
del_nvramcs.data[3] = del_nvramcs.q[2];
del_nvramcs.data[4] = del_nvramcs.q[3];
del_nvramcs.data[5] = del_nvramcs.q[4];
del_nvramcs.data[6] = del_nvramcs.q[5];
del_nvramcs.data[7] = del_nvramcs.q[6];
del_nvramcs.data[8] = del_nvramcs.q[7];
del_nvramcs.data[9] = del_nvramcs.q[8];
nvram_cs_n = del_nvramcs.q[4] # (!del_nvramcs.q[9] & !writeNVRAM_n) # nvram_burst_cs_n;
!WriteNVRAM_n =!CSTiming_n & !LDevR_W_n;
!uart_cs_n = !lcs_n[2] & !CSTiming_n;
-- LBOOTCS_N, Boot area and aboveboot area
abovebootarea = (!lbootcs_n & ldev_addr[20] & ldev_addr[19]);
bootarea = (!lbootcs_n & ldev_addr[20] & !ldev_addr[19]);
hiarea = (!lbootcs_n & !ldev_addr[20] & ldev_addr[19]);
loarea = (!lbootcs_n & !ldev_addr[20] & !ldev_addr[19]);
-- Chip select 0, upperarea and lowerarea
toparea = (!lcs_n[0] & ldev_addr[20] & ldev_addr[19]);
botarea = (!lcs_n[0] & ldev_addr[20] & !ldev_addr[19]);
upperarea = (!lcs_n[0] & !ldev_addr[20] & ldev_addr[19]);
lowerarea = (!lcs_n[0] & !ldev_addr[20] & !ldev_addr[19]);
FLASH/SRAM/BIG = (!flash_n/sram_sel & !bootsmall_n); -- boot from small flash
BIG/FLASH/SRAM = (!flash_n/sram_sel & bootsmall_n); -- boot BIG, flash at top of CS0
SRAM/FLASH/BIG = ( flash_n/sram_sel & !bootsmall_n); -- boot from SRAM
BIG/SRAM/FLASH = ( flash_n/sram_sel & bootsmall_n); -- boot BIG, SRAM at top of CS0
test = small_flash_hi_cs_n; -- for debug only
!small_flash_hi_cs_n = (!CSTiming_n &
((FLASH/SRAM/BIG & abovebootarea)
# (BIG/FLASH/SRAM & toparea)
# (SRAM/FLASH/BIG & hiarea)
# (BIG/SRAM/FLASH & upperarea)));
!small_flash_lo_cs_n = (!CSTiming_n &
((FLASH/SRAM/BIG & bootarea)
# (BIG/FLASH/SRAM & botarea)
# (SRAM/FLASH/BIG & loarea)
# (BIG/SRAM/FLASH & lowerarea)));
!sram_hi_cs_n = (!CSTiming_n &
((FLASH/SRAM/BIG & hiarea)
# (BIG/FLASH/SRAM & upperarea)
# (SRAM/FLASH/BIG & abovebootarea)
# (BIG/SRAM/FLASH & toparea)));
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