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General| Chipset Series | 6 Series |
|---|---|
| Code Name | Cougar Point |
| Max # of SATA 3.0 Ports | 2 |
| Max # of SATA 2.0 Ports | 4 |
| Socket Support | LGA1155 |
| PCI Express Version | 2.0 |
| SATA Ports | 6 |
| USB Ports | 14 |
| Chipset | Intel H61 Express Chipset, Intel H67 Express Chipset, Intel P67 Express Chipset, Intel Z68 Express Chipset |
| Memory Support | DDR3 |
| RAID Support | Yes |
| Integrated Graphics | Yes |
| Overclocking Support | Yes (P67, Z68) |
| TDP | 6.1W |
| Launch Date | Q1'11 |
| Supported Processor Series | 2nd Generation Intel Core Processors |
| Release Date | Q1'11 |
Provides an overview of the document's sections and their content.
Explains notations and terminology used throughout the document for clarity.
Lists hardware, software, and documentation included in the development kit.
Outlines the essential steps for setting up the development kit system correctly.
Details processor compatibility and features supported by the development board.
Describes the Intel 6 Series Chipset features and its support on the board.
Highlights the major components and their descriptions on the development board.
Defines terms and acronyms used in the document for technical understanding.
Lists available Intel classified documents and information related to the development kit.
Provides information on obtaining additional technical support and online resources.
Specifies necessary hardware components not supplied with the development kit.
Specifies necessary software components not supplied with the development kit.
Details the PCIe slots, their configurations, and compliance with the PCIe Base Specification.
Provides information on accessing technical documentation and support via Intel's website.
Guides users on how to contact Intel representatives or distributors for further assistance.
Details safety precautions and environment setup for working with the development kit.
Outlines the essential steps for setting up the development kit system correctly.
Provides instructions on how to power up the development kit and enter BIOS setup.
Describes the available options for safely powering down the development board.
Information about the pre-loaded AMI BIOS and how to access it.
Explains how to modify BIOS settings to enable or disable board features.
Provides step-by-step instructions for updating the system BIOS via a USB drive.
Specifies the external clock inputs required by the processor for operation.
Details the on-board Intel MVP-7 voltage regulator for processor and graphics power.
Introduces the Intel 6 Series Chipset and its key differences from previous generations.
Enables Intel High Definition Audio functionality via the Mott Canyon 4 daughter card.
Details the six SATA ports on the development board and their connection types.
Describes the display output options supported by the development board.
Details the on-board DP and HDMI connectors and configuration options.
Details the fourteen USB 2.0/1.1 ports and their configurations.
Provides information on the fourteen USB 2.0/1.1 ports available on the development board.
Explains the SVID interface for regulating processor and graphics core voltages.
Details processor power states and important power management signals.
Details the dual-channel DDR3 memory interface and supported module types.
Details the internal and external graphics capabilities supported by the board.
Describes support for internal graphics via the Embedded DisplayPort (eDP).
Details support for external graphics via the on-board PCIe graphics x16 slot.
Explains the DMI-2 interface for communication between processor and PCH.
Details the FDI link for transmitting display information from processor to PCH.
Describes how processor temperature is communicated and important thermal signals.
Explains the PWM-based fan speed control for processor cooling.
Introduces the Intel 6 Series Chipset and its key differences from previous generations.
Lists important power management signals related to the Intel 6 Series Chipset.
Details the PCIe slots, their configurations, and compliance with the PCIe Base Specification.
Details the on-board Gigabit Ethernet PHY and its connection to the PCH.
Enables Intel High Definition Audio functionality via the Mott Canyon 4 daughter card.
Provides information on using a Realtek audio card with the development board.
Details the six SATA ports on the development board and their connection types.
Describes the display output options supported by the development board.
Details the on-board HDMI connector and its interface support.
Describes the Display Port connectors and their configurations on the board.
Explains the configuration of the PCH's Port D as an eDP port.
Details the SDVO configuration options, typically via an add-in card.
Details the on-board DP and HDMI connectors and configuration options.
Details the Display Mini PCIe connector and its data interface options.
Explains the platform feature for seamless switching between internal and external graphics.
Details the fourteen USB 2.0/1.1 ports and their configurations.
Provides information on the fourteen USB 2.0/1.1 ports available on the development board.
Details the LPC Super I/O and its slot for testing other solutions.
Describes the serial port and IrDA capabilities integrated into the SMSC SIO.
Details the SMC/KBC controller functions, including PS/2 ports and system monitoring.
Explains the Serial Peripheral Interface for supporting flash devices and BIOS programming.
Details the Multi-BIOS support and jumper configurations for selecting BIOS images.
Describes the integrated and buffered clocking modes and system clock synthesizer.
Details clock configuration for XDP and top-side probing using SRC8.
Describes the on-board battery maintaining power to the real-time clock (RTC).
Explains XDP and port 80-83 add-in cards for debug support.
Describes the three supported power sources: ATX, AC/DC, and external batteries.
Provides specific recommendations for ATX power supplies and warnings against non-compliant ones.
Lists and describes the various power management states (M-states) of the board.
Describes the various board connectors used for peripherals and power.
Details the connectors located on the back panel of the development board.
Provides a reference table for all configuration jumpers and their default settings.
Describes the function and location of the board's power and reset buttons.
Lists the necessary hardware components to get the development kit running.
Step-by-step guide for flashing the system BIOS to SPI devices.
Explains how to upgrade the microcontroller firmware for system management.
Identifies key jumpers used for SPI and H8 programming procedures.
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