Figure 12. The QSFPDD-23 NRZ Tab
The following sections describe controls in the QSFPDD NRZ tab.
Status
The Status control displays the following status information during the loopback test:
• PLL Lock: Shows the PLL locked or unlocked state.
• Pattern Sync: Shows the pattern synced or not state. The pattern is considered
synced when the start of the data sequence is detected.
• Detail: Shows the PLL lock and pattern sync status of each channel. The number
of the error bits of each channel can be found here.
Figure 13. QSFPDD NRZ—PLL and Pattern Status
Control
Use the following controls to select an interface to apply PMA settings, data type, and
error control:
4. Board Test System
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7 FPGA I-Series Transceiver (6 × F-Tile) Development Kit User Guide
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