11-10 Status Structure Model 6220/6221 Reference Manual
Return to Section 11 topics
Programming example — set MSS (B6) when error occurs
The first command of the following sequence enables EAV (error available). When
an invalid command is sent (line 4), bits B2 (EAV) and B6 (MSS) of the status byte
register set to 1. The last command reads the status byte register using the binary
format (which directly indicates which bits are set). The command to select format
(FORMat:SREGister) is documented in Tabl e 1 1-2 . To determine the exact nature
of the error, you will have to read the error queue (see “Queues,” on page 11-20).
Status register sets
As shown in Figure 11-1, there are four status register sets in the status structure
of the Model 622x: standard event status, operation event status, measurement
event status, and questionable event status.
Register bit descriptions
When an error or status event occurs, a coded message is briefly displayed and
placed in the Error Queue. The occurrence of an error/status event also sets a
status register bit. The coded error/status messages are listed in Appendix B.
The status register bits are described as follows. Included with the bit descriptions
are the codes for the error/status event(s) that caused the bit to set.
Table 11-3
Common commands — status byte and service request enable registers
Command Description Default
*STB? Read status byte register.
*SRE <NDN> or <NRf> Program the service request enable register:
<NDN> = #Bxx…x Binary format (each x = 1 or 0)
= #Hx Hexadecimal format (x = 0 to FF)
= #Qx Octal format (x = 0 to 377)
<NRf> = 0 to 255 Decimal format
Note
*SRE? Read the service request enable register.
Note: *CLS and STATus:PRESet have no effect on the service request enable register.
*CLS ‘ Clears Error Queue.
*SRE 4 ‘ Enables EAV.
FORM:SREG BIN ‘ Selects binary format.
BadCommand ‘ Generates error.
*STB? ‘ Read Status Byte Register.
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