140 E8257D/67D, E8663D PSG Signal Generators Service Guide
Troubleshooting
Overall Description
Ramp Sweep Mode (Option 007)
The A9 YIG Driver, A18 CPU, A7 Reference and the A6 Frac–N are used in
sweep mode, but the A5 Sampler is not. The A9 YIG Driver does the following:
— generates the sweep rate
— sets the start frequency
— generates the sweep ramp
— provides delay compensation
— adjusts the ALC leveling reference for improved power flatness during
sweep
The A6 Frac–N contains the phase lock circuitry required to monitor and
maintain phase lock during sweep. It also provides a correction frequency
voltage to the A9 YIG Driver.
Output Power Level/Automatic Leveling Control
The output power control circuitry, commonly referred to as the ALC loop,
comprises the following:
— Two detectors: the A23 Lowband Coupler/Detector (frequencies ≤2 GHz)
and the A24 Highband Coupler/A25 Highband Detector (frequencies
>2 GHz). Note: this is not the same frequency breakpoint as defined by the
lowband and highband paths.
The couplers couple off a small portion of the RF signal and route it to the
detectors. The detectors convert the RF signal to a dc voltage proportional
to the RF power level. This dc voltage is routed to the A10 ALC and used to
adjust the output power.
— An ALC assembly (A10)
—Two ALC modulators
In ALC leveling on (closed loop operation), the output level is detected and a
voltage fed back and compared to a reference voltage. The output of the
comparator controls the modulator drive current, which controls the output
power level. When the detected and reference voltage levels are the same, the
modulator drive current remains constant. When the detected and reference
levels are not the same, the modulator drive current changes, causing the RF
output power to increase or decrease until the reference and detected voltages
are the same.
In ALC leveling off (open loop operation), only a reference voltage is used to
control the modulation drive current. The comparator output is the sum of the
reference voltage and stored calibration data for that frequency point; no
feedback is provided. The stored calibration data is correction information
stored in the instrument during power level calibration; it adjusts for any losses
that occur after the coupler/detector. The reference voltage is generated on
the A10 ALC by a DAC, the output voltage of which is the result of the power
level set on the front panel.
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