PQIII Debugger | 18
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D: updated not updated updated updated
P: not updated updated (*) updated updated
Memory
Class
D-Cache I-Cache L2 Cache Memory (uncached)
(*) Depending on the debugger configuration, the coherency of the instruction cache will not be
achieved by updating the instruction cache, but by invalidating the instruction cache. See
SYStem.Option.ICFLUSH for details.
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