Lauterbach TRACE32 User Manual

PQIII Debugger | 31
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1989-2021 Lauterbach GmbH
SYStem.MemAccess Run-time memory access (non-intrusive)
This option declares if and how a non-intrusive memory access can take place while the CPU is executing
code. Although the CPU is not halted, run-time memory access creates an additional load on the
processor’s internal data bus. The run-time memory access has to be activated for each window by using
the access class E: (e.g. Data.dump E:0x100) or by using the format option %E (e.g. Var.View %E var1). It
is also possible to activate this non-intrusive memory access for all memory ranges displayed on the
TRACE32 screen by setting SYStem.Option.DUALPORT ON.
Format: SYStem.MemAccess <mode>
<mode>: Denied | Enable
Denied Memory access is disabled while the CPU is executing code.
Enable
CPU (deprecated)
The debugger performs memory accesses via a dedicated CPU
interface. This memory access will snoop data cache and L2 cache if a
access class for data (“D:”) is used.
StopAndGo Temporarily halts the core(s) to perform the memory access. Each stop
takes some time depending on the speed of the JTAG port, the number of
the assigned cores, and the operations that should be performed.

Lauterbach TRACE32 Specifications

General

Operating System Support (Host)	Windows, Linux
Manufacturer	Lauterbach GmbH
Category	Debug and Trace Tool
Supported Architectures	ARM, Power Architecture, RISC-V, x86
Interface	JTAG, SWD, Nexus, Aurora
Features	Debugging, tracing, multicore debugging
Host Interface	USB, Ethernet
IDE Integration	Eclipse
Scripting Language	Practice
Power Measurement	Yes (requires specific PowerProbe hardware)
Trace Technology	Instruction Trace, Data Trace
License Type	Floating license, node-locked license available
Software Compatibility	Supports various compilers and toolchains