Lauterbach TRACE32 - On-chip Trace on MPC85 XX;QorIQ

PQIII Debugger | 22
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The example scripts are in the folders:
• ~~/demo/powerpc/hardware/mpc85xx/
• ~~/demo/powerpc/hardware/qoriq_p1_p2/
• ~~/demo/powerpc/hardware/bsc913x/
For NOR FLASH on LBC/IFC CS0, there are ready-to-use flash scripts which can be used without change.
These scripts can be found in the all_boards subfolder.
Scripts for NAND, EMMC, SPI and for the I2C boot sequencer EEPROM have to be modified in respect of
the target board’s characteristics and used FLASH devices. Therefore many reference scripts usable on
evaluation boards are included in the corresponding subfolder.
There are also example script which can encode and program the data as requested by the processor when
booting from SPI or using the boot sequencer, for example:
• ~~/demo/powerpc/hardware/mpc85xx/mpc8536ds/program_spibootflash.cmm
• ~~/demo/powerpc/hardware/mpc85xx/mpc8569mds/program_bootsequencer.cmm
On-chip Trace on MPC85XX/QorIQ
Processors of the MPC85XX series have a built-in trace buffer with 256 entries. It can be used to trace
transactions that occur on the internal memory bus according to the selected major interface (local bus,
DDR SDRAM and PCI). The trace buffer holds information about transaction address, transaction type,
source, target ID and the byte count.
The interface can be selected with the command Onchip.Mode.IFSel. All other configurations can be done
directly via the menu for CPU peripherals in the section “Debug Features and Watchpoint Facility”.
Here is an example of how to set up the on-chip trace buffer to trace the data accesses of the PowerPC core.
Please note that only uncached accesses will be recorded in the trace buffer::
; select interface ECM
Onchip.Mode.IFSEL ECM
; configure onchip trace
; TBCR0 address match disable 0x40000000
; transaction match disable 0x20000000
; source ID enable 0x04000000
; method trace events 0x00020000
Data.Set iobase.address()+0x000E2040 %LONG 0x64020000
; TBCR1 src ID = d-fetch 0x00110000
Data.Set iobase.address()+0x000E2044 %LONG 0x00110000
; enable automatically when CPU is started
Onchip.AutoArm ON