Lauterbach TRACE32 User Manual

PQIII Debugger | 52
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1989-2021 Lauterbach GmbH
TrOnchip.Set Enable special on-chip breakpoints
Enables the specified on-chip trigger facility to stop the CPU on below events:
Format: TrOnchip.Set <event> [ON | OFF]
<event> Description
BRT
IRPT
RET
CIRPT
CRET
CI
MC
DS
IS
EI
AL
PR
FP
SC
AU
DEC
FIT
WD
DTLB
ITLB
DBG
SPEU
SPED
SPER
PM
Break on branch taken event.
Break on interrupt entry.
Break on return from interrupt.
Break on critical interrupt entry.
Break on return from critical interrupt.
Break on critical input interrupt.
Break on machine check interrupt.
Break on data storage interrupt.
Break on instruction storage interrupt.
Break on external input interrupt.
Break on alignment interrupt.
Break on program interrupt.
Break on fpu unavailable interrupt.
Break on system call.
Break on auxiliary processor unavailable interrupt.
Break on decrementer interrupt.
Break on fixed interval timer interrupt.
Break on watchdog interrupt.
Break on data TLB error interrupt.
Break on instruction TLB interrupt.
Break on debug interrupt - do not clear if breakpoints are used.
Break on SPE APU unavailable interrupt.
Break on SPE floating-point data interrupt.
Break on SPE floating-point round interrupt.
Break on performance monitor interrupt.

Lauterbach TRACE32 Specifications

General

Operating System Support (Host)	Windows, Linux
Manufacturer	Lauterbach GmbH
Category	Debug and Trace Tool
Supported Architectures	ARM, Power Architecture, RISC-V, x86
Interface	JTAG, SWD, Nexus, Aurora
Features	Debugging, tracing, multicore debugging
Host Interface	USB, Ethernet
IDE Integration	Eclipse
Scripting Language	Practice
Power Measurement	Yes (requires specific PowerProbe hardware)
Trace Technology	Instruction Trace, Data Trace
License Type	Floating license, node-locked license available
Software Compatibility	Supports various compilers and toolchains