PQIII Debugger | 38
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On-chip debug events that cause a debug interrupt can be configured to cause one of two actions. If a JTAG
debugger is used, the CPU is configured to stop for JTAG upon these debug events.
If this option is set to ON, the CPU will be configured to not stop for JTAG, but to enter the debug interrupt,
like it does when no JTAG debugger is used.
Enable this option if the CPU should not stop for JTAG on debug events, in order to allow a target application
to use the debug interrupt. Typical usages for this option are run-mode debugging (e.g. with
t32server/gdbserver) or setting up the system for a branch trace via LOGGER (trace data in target RAM) or
INTEGRATOR.
SYStem.Option.NOTRAP Use alternative software breakpoint instruction
Defines which instruction is used as software breakpoint instruction.
Format: SYStem.Option.NOTRAP <type>
<type>: OFF | FPU | ILL
ON (deprecated, same as FPU)
OFF Use TRAP instructions as software breakpoint (default setting). Software
breakpoint will overwrite SRR0/1 registers.
FPU Use an FPU instruction as software breakpoint.
Gives the ability to use the program interrupt in the application without
halting for JTAG.
This setting only works if the application does not use floating point
instructions (neither hardware nor software emulated). MSR[FP] must be
set to 0 at all times.
Software breakpoint will overwrite SRR0/1 registers.
ILL Use an illegal instruction as software breakpoint. This setting is
recommended for MPC82XX, MPC5200, RHPPC (G2/G2_LE cores) and
MPC830X, MPC831X, MPC832X and MPC512X (e300c2/3/4). Gives the
ability to use the program interrupt in the application without halting for
JTAG.
Illegal instructions as software breakpoints will preserve SRR0/1
registers.
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