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Lime Microsystems LMS7002MR3 - Page 16

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12
Address (15 bits)
Bits
Description
0x0023
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DIQDIRCTR2: DIQ2 direction control mode.
0 Automatic (default)
1 Manual, controllable from DIQDIR2
DIQDIR2: DIQ2 direction.
0 Output
1 Input (default)
DIQDIRCTR1: DIQ1 direction control mode.
0 Automatic (default)
1 Manual, controllable from DIQDIR1
DIQDIR1: DIQ1 direction.
0 Output
1 Input (default)
ENABLEDIRCTR2: ENABLE2 direction control mode.
0 Automatic (default)
1 Manual, controllable from ENABLEDIR2
ENABLEDIR2: ENABLE2 direction.
0 Output
1 Input (default)
ENABLEDIRCTR1: ENABLE1 direction control mode.
0 Automatic (default)
1 Manual, controllable from ENABLEDIR1
ENABLEDIR1: ENABLE1 direction.
0 Output
1 Input (default)
Reserved
MOD_EN: LimeLight
TM
interface enable.
0 Interface disabled
1 Interface enabled (default)
LML2_FIDM: Frame start ID selection for Port 2, when LML2_MODE = 0.
0 Frame start, when 0 (default)
1 Frame start, when 1
LML2_RXNTXIQ: TXIQ/RXIQ mode selection for Port 2, when LML2_MODE = 0.
0 BB2RF (TXIQ) mode
1 RF2BB (RXIQ) mode (default)
LML2_MODE: Mode of LimeLight
TM
Port 2.
0 TRXIQ mode
1 JESD207 mode (default)
LML1_FIDM: Frame start ID selection for Port 1, when LML1_MODE = 0.
0 Frame start, when 0 (default)
1 Frame start, when 1
LML1_RXNTXIQ: TXIQ/RXIQ mode selection for Port 1, when LML1_MODE = 0.
0 BB2RF (TXIQ) mode (default)
1 RF2BB (RXIQ) mode
LML1_MODE1: Mode of LimeLight
TM
Port 1.
0 TRXIQ mode
1 JESD207 mode (default)
Default: 01010101 01011001

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