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Lime Microsystems LMS7002MR3 - Page 15

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11
Address (15 bits)
Bits
Description
0x0022
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
LML2_TRXIQPULSE: TRXIQPULSE mode selection for LML Port 2.
0 TRXIQPULSE mode off (default)
1 TRXIQPULSE mode on
LML2_SISODDR: SISODDR mode selection for LML Port 2.
0 SISODDR mode off (default)
1 SISODDR mode on
LML1_TRXIQPULSE: TRXIQPULSE mode selection for LML Port 1.
0 TRXIQPULSE mode off (default)
1 TRXIQPULSE mode on
LML1_SISODDR: SISODDR mode selection for LML Port 1.
0 SISODDR mode off (default)
1 SISODDR mode on
DIQ2_DS: Driver strength of DIQ2 pad.
0 Driver strength is 4mA (default)
1 Driver strength is 8mA
DIQ2_PE: Pull up control of DIQ2 pad.
0 Pull up disengaged
1 Pull up engaged (default)
IQ_SEL_EN_2_PE: Pull up control of IQ_SEL_EN_2 pad.
0 Pull up disengaged
1 Pull up engaged (default)
TXNRX2_PE: Pull up control of TXNRX2 pad.
0 Pull up disengaged
1 Pull up engaged (default)
FCLK2_PE: Pull up control of FCLK2 pad.
0 Pull up disengaged
1 Pull up engaged (default)
MCLK2_PE: Pull up control of MCLK2 pad.
0 Pull up disengaged
1 Pull up engaged (default)
DIQ1_DS: Driver strength of DIQ1 pad.
0 Driver strength is 4mA (default)
1 Driver strength is 8mA
DIQ1_PE: Pull up control of DIQ1 pad.
0 Pull up disengaged
1 Pull up engaged (default)
IQ_SEL_EN_1_PE: Pull up control of IQ_SEL_EN_1 pad.
0 Pull up disengaged
1 Pull up engaged (default)
TXNRX1_PE: Pull up control of TXNRX1 pad.
0 Pull up disengaged
1 Pull up engaged (default)
FCLK1_PE: Pull up control of FCLK1 pad.
0 Pull up disengaged
1 Pull up engaged (default)
MCLK1_PE: Pull up control of MCLK1 pad.
0 Pull up disengaged
1 Pull up engaged (default)
Default: 00000111 11011111

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