COARSE_STEPDONE_CGEN: Read only
COARSEPLL_COMPO_CGEN: Read only
VCO_CMPHO_CGEN: Read only
VCO_CMPLO_CGEN: Read only
CP2_CGEN[3:0]: Controls the value of CP2 (cap from CP output to GND) in the PLL
filter. Default: 6
cp2=CP2_PLL_SX*6*63.2fF
CP3_CGEN[3:0]: Controls the value of CP3 (cap from VCO Vtune input to GND) in
the PLL filter. Default: 7
cp3=CP3_PLL_SX*248fF
CZ_CGEN[3:0]: Controls the value of CZ (Zero capacitor) in the PLL filter. Default:
11
cz=CZ_PLL_SX*8*365fF
Default: 00000110 01111011
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