Mips Technologies Malta - Table 3.21 I2 CSEL Register

3.9 I2C
MIPS® Malta™ User’s Manual, Revision 01.07 23
Copyright © 2000-2007 MIPS Technologies Inc. All rights reserved.
0 I2CSDA The value of this bit will be driven to the I2C
SDA pin when the I2CSDA bit of the I2COE
register is “1”.
1
Name: I2CSEL
Address: 0x1F00.0B18
Access: R/W
Reset Value: 0x01
Table 3.21 I2CSEL Register
Bits Field Name Function Initial Value
31:1 Reserved Reserved n/a
0 I2CFPGA “1” means that the I2C controller in the FPGA
is enabled and the I2C controller in the South
Bridge is disconnected from the I2C bus.
“0” means that the I2C controller in the FPGA
is disabled and the I2C controller in the South
Bridge is connected to the I2C bus.
1
Table 3.20 I2COUT Register
Bits Field Name Function Initial Value