Mitsubishi MELSEC System Q User Manual

PLC CPUs
쎲
Q00JCPU
CPU, power supply and a 5-slot base unit form an inseparable unit. Multi-CPU operation is
not possible with a Q00JCPU.
–
Memory capacity for program: 8 k steps
–
Execution time for a logical instruction: 0.2 µs
All of the following PLC CPUs are capable for Multi-CPU operation.
쎲
Q00CPU
–
Memory capacity for program: 8 k steps
–
Execution time for a logical instruction: 0.16 µs
쎲
Q01CPU
–
Memory capacity for program: 14 k steps
–
Execution time for a logical instruction: 0.10 µs
쎲
Q02CPU
–
Memory capacity for program: 28 k steps
–
Execution time for a logical instruction: 0.079 µs
쎲 Q02HCPU
– Memory capacity for program: 28 k steps (extendable with memory card)
– Execution time for a logical instruction: 0.034 µs
쎲 Q06HCPU
– Memory capacity for program: 60 k steps (extendable with memory card)
– Execution time for a logical instruction: 0.034 µs
쎲 Q12HCPU
–
Memory capacity for program: 124 k steps (extendable with memory card)
–
Execution time for a logical instruction: 0.034 µs
쎲
Q25HCPU
–
Memory capacity for program: 252 k steps (extendable with memory card)
–
Execution time for a logical instruction: 0.034 µs
3–8 MITSUBISHI ELECTRIC
The CPU Modules The MELSEC System Q

Mitsubishi MELSEC System Q Specifications

General

Brand	Mitsubishi
Model	MELSEC System Q
Category	Controller
Language	English