7210 SAS-M, T, R6, R12, Mxp, Sx, S Basic System
Configuration Guide
System Management
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6.5.3 Synchronization Status Messages
Synchronization Status Messages (SSM) are supported on devices that support
Synchronous Ethernet. SSM allows the synchronization distribution network to
determine the quality level of the clock sourcing a specific synchronization trail and
also allows a network element to select the best of multiple input synchronization
trails. SSMs are defined for various transport protocols (including SONET/SDH, T1/
E1, and Synchronous Ethernet), for interaction with office clocks (such as BITS or
SSUs) and embedded network element clocks.
SSM allows equipment to autonomously provision and reconfigure (by reference
switching) their synchronization references, while helping to avoid the creation of
timing loops. These messages are particularly useful for synchronization re-
configurations when timing is distributed in both directions around a ring.
6.5.4 DS1 Signals
DS1 signals can carry the quality level value of the timing source information using
the SSM that is transported within the 1544 kb/s signal Extended Super Frame (ESF)
Data Link (DL), as described in ITU-T Recommendation G.704. No such provision is
extended to SF formatted DS1 signals.
The format of the ESF DL messages is 0xxx xxx0 1111 1111, with the rightmost bit
transmitted first. The 6 bits denoted by xxx xxx contain the message; some of these
messages are reserved for synchronization messaging. It takes 32 frames (4 ms) to
transmit all 16 bits of a complete DL.
6.5.5 E1 Signals
E1 signals can carry the quality level value of the timing source information using the
SSM, as described in ITU-T Recommendation G.704.
One of the Sa4 to Sa8 bits is allocated for SSMs; choosing the Sa bit that carries the
SSM is user-configurable. To prevent ambiguities in pattern recognition, it is
necessary to align the first bit (San1) with frame 1 of a G.704 E1 multiframe.
The San bits are numbered (n = 4, 5, 6, 7, 8). A San bit is organized as a 4-bit nibble
San1 to San4. San1 is the most significant bit, and San4 is the least significant bit.
The message set in San1 to San4 is a copy of the set defined in SDH bits 5 to 8 of
byte S1.
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