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TR bits in a program are used to output (OUT) the execution condition at the
branching point and then to load back (LD) the execution condition when it is
required after returning to the branch lines. Within any one instruction block,
OUT cannot be used with the same TR address. The same TR address can,
however, be used with LD as many times as required. The following example
shows an instruction block using two TR bits. TR 1 is used in LD once; TR 0,
twice.
0000 0001 0002
0003
0004
0005
0500
0501
0502
0503
TR
0
TR
1
Address Instruction Data
0000 LD 0000
0001 OUT TR 0
0002 AND 0001
0003 OUT TR 1
0004 AND 0002
0005 OUT 0500
0006 LD TR 1
0007 AND 0003
0008 OUT 0501
0009 LD TR 0
0010 AND 0004
0011 OUT 0502
0012 LD TR 0
0013 AND NOT 0005
0014 OUT 0503
If the condition assigned 0004 was not in the diagram, the second LD using
TR 0 would not be necessary because OUT with 0502 and the AND NOT
with 0005 both require the same execution condition, i.e., the execution con-
dition stored in TR 0. The diagram and mnemonic code for this program are
shown below.
TR Bits
Converting to Mnemonic Code Section 7–2
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