18
The following table shows which bits can be used as I/O bits in each of the
Expansion I/O Units. Bits in the shaded areas can be used as work bits but
not as output bits. The word addresses depend on the Unit(s) that the Expan-
sion I/O Unit is coupled to. In all cases the first Expansion I/O Unit address
for input and output words is one more than the last address for input and
output words used by the Unit to which the Expansion I/O Unit is attached.
For example, if the last word address was IR 03, the first input or output word
address for the Expansion I/O Units will be IR 04. In the tables below “n” is
the word allocated prior to the Expansion I/O Unit.
08
09
10
11
12
13
14
15
08
09
10
11
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n+1)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
IR (n + 6)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
IR (n + 2)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 6)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
IR (n + 2)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 1)
00
01
02
03
04
05
06
07
IR (n + 1)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 6)
00
01
02
03
08
09
10
11
12
13
14
15
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 6)
Model Input bits Output bits Model Input bits Output bits
C20P
C16P
Input
C28P
C40P
C60P
C16P
Output
C4K
Input
C4K
Output
Cannot
be used
Cannot
be used
Cannot
be used
IR (n+1)
IR (n+1)
IR (n+1)
IR (n + 6)
IR (n + 6)
IR (n + 4)
IR (n + 4)
IR (n + 1)
IR (n + 1)
Cannot
be used
Cannot
be used
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 6)
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
IR (n + 6)
I/O Bits Available in
Expansion I/O Units
IR Area Section 3–3