You can also clear all event registers with
the *CLS (Clear Status) command.
n
Status Condition Registers
Two of the status register structures also
have condition registers: The Status Op
-
eration and the Status Questionable regis
-
ter.
The condition registers differ from the
event registers in that they are not
latched. That is, if a condition in the
counter goes on and then off, the condi
-
tion register indicates true while the con
-
dition is on and false when the condition
goes off. The Event register that monitors
the same condition continues to indicate
true until you read the register.
–
:STATus:OPERation:CONDition?
Reads the Operation Status Condition reg-
ister
– :STATus:QUEStionable:CONDi-
tion? Reads the Questionable Status
Condition register
Reading the condition register will not af-
fect the contents of the register.
Why Two Types of Registers?
Let’s say that the counter measures con
-
tinuously and you want to monitor the
measurement cycle by reading the Opera
-
tion Status register.
Reading the Event Register will always
show that a measurement has started, that
waiting for triggering and bus arming has
occurred and that the measurement is
stopped. This information is not very use
-
ful.
Reading the Condition Register on the
other hand gives only the status of the
measurement cycle, for instance “Mea
-
surement stopped”.
+
Although it is possible to read the
condition registers directly, we
recommend that you use SRQ
when monitoring the measure
-
ment cycle. The measurement
cycle is disturbed when you read
condition registers.
n
Summary:
The way to work when writing your bus
program is as follows:
Set up
–
Set up the enable registers so that the
events you are interested in are summa
-
rized in the status byte.
–
Set up the enable masks so that the condi-
tions you want to be alerted about generate
SRQ. It is good practice to generate SRQ
on the EAV bit. So, enable the EAV-bit via
*SRE.
Check & Action
–
Check if an SRQ has been received.
–
Make a serial poll of the instruments
on the bus until you find the instru
-
ment that issued the SRQ (the instru
-
ment that has RQS bit true in the Sta
-
tus Byte).
–
When you find it, check which bits
in the Status Byte Register are true.
–
Let’s say that bit 7, OPR, is true.
Then read the contents of the Opera
-
tion Status Register. In this register
you can see what caused the SRQ.
–
Take appropriate actions depending
on the reason for the SRQ.
Using the Subsystems
Status Subsystem 6-15
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