Figure 8-17: I2C Current Address READ Operation
Random READ Operation
Random read operations allow the master to access any memory location
in a random manner. To perform this type of read operation, the byte
address must first be set. This is accomplished by sending the byte
address to the VPC3+S as part of a write operation (R/W bit set to ‘0’).
Once the byte address is sent, the master generates a START condition
following the acknowledge. This terminates the write operation, but not
before the internal Address Pointer is set. The master issues the control
byte again, but with the R/W bit set to a ‘1’. The VPC3+S will then issue an
acknowledge and transmit the 8-bit data byte. The master will not
acknowledge the transfer, but does generate a Stop condition which
causes the VPC3+S to discontinue transmission (Figure 8-17). After a
random Read command, the internal address counter will point to the
address location following the one that was just read.
Figure 8-18: I2C Random READ Operation
Sequential READ Operation
Sequential reads are initiated in the same way as a random read, except
that once the VPC3+S transmits the first data byte, the master issues an
acknowledge as opposed to the Stop condition used in a random read. This
acknowledge directs the VPC3+S to transmit the next sequentially
addressed data byte (Figure 8-19). Following the final byte transmitted to
the master, the master will NOT generate an acknowledge, but will
generate a STOP condition. To provide sequential reads, the VPC3+S
contains an internal Address Pointer which is incremented by ‘1’ upon
completion of each operation. This Address Pointer allows the entire
memory contents to be serially read during one operation. The internal
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