Profichip VPC3+S - Page 36

5 ASIC Interface
36
Revision 1.04
VPC3+S User Manual
Copyright © profichip GmbH, 2012
Interrupt-Request-Register, Low-Byte, Address 00H (Intel):
bit 7
rw-0
DXB_Out:
VPC3+S has received a DXB telegram and made the new output data available
in the ‘N’ buffer.
bit 6
rw-0
New_Ext_Prm_Data:
The VPC3+S has received a Set_Ext_Prm telegram and made the data
available in the Parameter-Buffer.
bit 5
rw-0
DXB_Link_Error:
The Watchdog cycle is elapsed and at least one Publisher-Subscriber
connection breaks down.
bit 4
rw-0
User_Timer_Clock:
The time base for the User_Timer_Clocks is run out (1 / 10ms).
bit 3
rw-0
WD_DP_CONTROL_Timeout:
The watchdog timer expired in the DP_CONTROL state.
bit 2
rw-0
Baud_Rate_Detect:
The VPC3+S has left the BAUD_SEARCH state and found a baud rate.
bit 1
rw-0
Go/Leave_DATA-EXCH:
The DP_SM has entered or exited the DATA-EXCH state.
bit 0
rw-0
MAC_Reset (used if CS_Supported=0):
After processing the current request, the VPC3+D has entered the Offline state
(by setting the Go_Offline bit).
Clock_Sync (used if CS_Supported=1):
The VPC3+D has received a Clock_Value telegram or an error occurs. Further
differentiation is made in the Clock_Sync-Buffer.
Figure 5-9: Interrupt-Request-Register, Low-Byte