Profichip VPC3+S - Page 81

PROFIBUS DP Extensions 7
VPC3+S User Manual
Revision 1.04
81
Copyright © profichip GmbH, 2012
Byte
Bit Position
Designation
7
6
5
4
3
2
1
0
0
Structured_Length
1
0
0
0
0
1
0
0
0
Structure_Type
2
0
0
0
0
0
0
0
0
Slot_Number
3
0
0
0
0
0
0
0
0
Reserved
4
:
5
Clock_Sync_Interval
Time Base 10 ms
6
:
13
Seconds (2
31
..0)
CS Delay Time
can be omitted
Fraction Part of Seconds (2
31
..0)
Base is 1/(2
32
) Seconds
Figure 7-27: Format of Structured_Prm_Data with Time AR
Byte
Bit Position
Designation
7
6
5
4
3
2
1
0
0
:
7
Seconds (2
31
..0) since 1.1.1900 0:00,00
or since 7.2.2036 6:28:16 if value < 0x9dff4400
Clock_Value_
Time_Event
Fraction Part of Seconds (2
31
..0)
Base is 1/(2
32
) Seconds
8
:
15
Seconds (2
31
..0) since 1.1.1900 0:00,00
or since 7.2.2036 6:28:16 if value < 0x9dff4400
Clock_Value_
previous_TE
Fraction Part of Seconds (2
31
..0)
Base is 1/(2
32
) Seconds
16
C
CV
reserviert
Clock_Value_Status1
17
ANH
SWT
reserviert
CR
reserviert
SYF
Clock_Value_Status2
Figure 7-28: Format of Clock_Value
Processing Sequence
The Clock_Sync_Interval is a time for monitoring and has to be written into
the Clock_Sync-Buffer by the user. The Time Receiver state machine in the
VPC3+S is started after this write access. The value for
Clock_Sync_Interval is locked until the next LEAVE-MASTER or a new
parameterization occurs. In addition it can be unlocked if the user set the
Stop_Clock_Sync in Command byte.