Quectel 5G Module Series Hardware Design

5G Module Series
RM500Q-AE&RM502Q-AE Hardware Design
RM500Q-AE&RM502Q-AE_Hardware_Design 31 / 86
It is recommended to use a host GPIO to control FULL_CARD_POWER_OFF#. A simple reference circuit
is illustrated in the following figure.
Host Module
FULL_CARD_POWER_OFF#
PMIC
GPIO
6
1.8 V or 3.3 V
NOTE: The voltage of pin 6 should be no less than 1.19V when it is at HIGH level.
R1
100k
Figure 8: Turn on the Module with a Host GPIO
The timing of turn-on scenario is illustrated by the following figure.
VCC
RESET#
20 s
Module power-on or insertion detection
USIM1_VDD
Module Status
FCPO#
RFFE_VIO_1V8
68 ms
System turn-on and booting
V
IH
≥ 1.19 V
1.8 V or 3.0 V
System bootingInactive Active
T
power-on
T
turn-on
T
booting
T
registering
1.5 V
3.7 V
1.8 V
Figure 9: Turn-on Timing of the Module
Table 9: Trun-on Timing of the Module
Symbol
Min.
Typ.
Max.
Comment
T
power-on
0 ms
20 ms
-
System power-on time depending on the host.

Quectel 5G Module Series Specifications

General

Brand	Quectel
Model	5G Module Series
Category	Motherboard
Language	English