Quectel 5G Module Series Hardware Design

5G Module Series
RM500Q-AE&RM502Q-AE Hardware Design
RM500Q-AE&RM502Q-AE_Hardware_Design 54 / 86
Table 29: Configuration Pins of the Module
The following figure shows a reference circuit of these four pins.
Host Module
CONFIG_0
CONFIG_1
CONFIG_2
CONFIG_3
GPIO
GPIO
GPIO
GPIO
21
69
75
1
VCC_IO_HOST
R1
10k
R2
10k
R3
10k
R4
10k
NM-0Ω
NM-0Ω
NM-0Ω
0Ω
NOTE: The voltage level of VCC_IO_HOST depends on the host side and could be 1.8 V or 3.3 V.
Figure 27: Recommended Circuit of Configuration Pins
Pin No.
Pin Name
I/O
Description
21
CONFIG_0
DO
Not connected internally
69
CONFIG_1
DO
Connected to GND internally
75
CONFIG_2
DO
Not connected internally
1
CONFIG_3
DO
Not connected internally

Quectel 5G Module Series Specifications

General

Brand	Quectel
Model	5G Module Series
Category	Motherboard
Language	English