Renesas R8C/20

R8C/20 Group, R8C/21 Group 12. Interrupts
Rev.2.00 Aug 27, 2008 Page 100 of 458
REJ09B0250-0200
12.1.6.10 Interrupt Priority Judgement Circuit
The interrupt priority judgement circuit selects the highest priority interrupt.
Figure 12.11 shows the Interrupt Priority Level Judgement Circuit.
Figure 12.11 Interrupt Priority Level Judgement Circuit
INT3
Timer RB
Timer RA
INT0
INT1
UART1 receive
UART0 receive
A/D conversion
SSU/I
2
C bus
(1)
Key Input
IPL
Priority level of each interrupt
Level 0 (default value)
Lowest
Highest
Priority of peripheral function interrupts
(if priority levels are same)
Interrupt request level
judgment output signal
Interrupt request
acknowledged
I flag
Address match
Watchdog timer
Oscillation stop detection
Voltage monitor 2
NOTE:
1. The IICSEL bit in the PMR register switches functions.
UART0 transmit
INT2
UART1 transmit
Timer RE
Timer RD0
Timer RD1