R8C/20 Group, R8C/21 Group 14. Timers
Rev.2.00 Aug 27, 2008 Page 260 of 458
REJ09B0250-0200
Figure 14.115 TRESEC Register in Output Compare Mode
Figure 14.116 TREMIN Register in Output Compare Mode
Timer RE Counter Data Register
Symbol Address After Reset
TRESEC
0118h 00h
RWFunction
8-bit counter data can be read.
Although Timer RE stops counting, the count value is held.
The TRESEC register is set to 00h w ith the compare match.
b7 b0
RO
Timer RE Compare Data Register
Symbol Address After Reset
TREMIN
0119h 00h
RWFunction
8-bit compare data is stored.
b7 b0
RW