R8C/20 Group, R8C/21 Group 15. Serial Interface
Rev.2.00 Aug 27, 2008 Page 272 of 458
REJ09B0250-0200
NOTE:
1. Set bits which are not in this table to 0 when writing to the registers in clock synchronous serial I/O
mode.
Table 15.3 lists the I/O Pin Functions in Clock Synchronous Serial I/O Mode. The TXD0 pin outputs “H” level
between the operating mode selection of UART0 and transfer start, an “H” (If the NCH bit is set to 1 (the N-
channel open-drain output), this pin is in a high-impedance state.)
Table 15.2 Registers Used and Settings in Clock Synchronous Serial I/O Mode
(1)
Register Bit Function
U0TB 0 to 7 Set transmit data
U0RB 0 to 7 Receive data can be read
OER Overrun error flag
U0BRG 0 to 7 Set bit rate
U0MR SMD2 to SMD0
Set to 001b
CKDIR Select the internal clock or external clock
U0C0 CLK1 to CLK0 Select the count source in the U0BRG register
TXEPT Transmit register empty flag
NCH Select TXD0 pin output mode
CKPOL Select the transfer clock polarity
UFORM Select the LSB first or MSB first
U0C1 TE Set this bit to 1 to enable transmit/receive
TI Transmit buffer empty flag
RE Set this bit to 1 to enable reception
RI Reception complete flag
U0IRS Select the UART0 transmit interrupt source
U0RRM Set this bit to 1 to use continuous receive mode
Table 15.3 I/O Pin Functions in Clock Synchronous Serial I/O Mode
Pin Name Function Selection Method
TXD0(P1_4) Output serial data (Outputs dummy data when performing receive only)
RXD0(P1_5) Input serial data The PD1_5 bit in the PD1 register = 0
(P1_5 can be used as an input port when performing transmit
only)
CLK0(P1_6) Output transfer clock The CKDIR bit in the U0MR register = 0
Input transfer clock The CKDIR bit in the U0MR register = 1
PD1_6 bit in PD1 register = 0
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