R8C/20 Group, R8C/21 Group 19. Flash Memory
Rev.2.00 Aug 27, 2008 Page 385 of 458
REJ09B0250-0200
19.4.2.11 FMR41 Bit
In EW0 mode, the MCU enters erase-suspend mode when setting the FMR41 bit to 1 by a program. The
FMR41 bit is automatically set to 1 (requests erase-suspend) when an interrupt request of an enabled interrupt is
generated in EW1 mode, and then the MCU enters erase-suspend mode.
Set the FMR41 bit to 0 (erase restart) when the auto-erase operation restarts.
19.4.2.12 FMR42 Bit
In EW0 mode, the MCU enters program-suspend mode when setting the FMR42 bit to 1 by a program. The
FMR42 bit is automatically set to 1 (requests program-suspend) when an interrupt request of an enabled
interrupt is generated in EW1 mode, and then the MCU enters program-suspend mode.
Set the FMR42 bit to 0 (program restarts) when the auto-program operation restarts.
19.4.2.13 FMR43 Bit
When the auto-erase operation starts, the FMR43 bit is set to 1 (during erase execution). The FMR43 bit
remains 1 (during erase execution) during erase-suspend operation.
When the auto-erase operation ends, the FMR43 bit is set to 0 (erase not executed).
19.4.2.14 FMR44 Bit
When the auto-program starts, the FMR44 bit is set to 1 (during program execution). The FMR44 bit remains 1
(during program execution) during program-suspend operation.
When the auto-program operation ends, the FMR44 bit is set to 0 (program not executed).
19.4.2.15 FMR46 Bit
The FMR46 bit is set to 0 (reading disabled) during auto-program or auto-erase execution and set to 1 (reading
enabled) in suspend mode. Do not access the flash memory while this bit is set to 0.
19.4.2.16 FMR47 Bit
Power consumption when reading the flash memory can be reduced by setting the FMR47 bit to 1 (enabled) in
low-speed on-chip oscillator mode (XIN clock stops).
To Next Page
Loading...
Need help?
General
