Renesas R8C/20 User Manual

R8C/20 Group, R8C/21 Group 19. Flash Memory
Rev.2.00 Aug 27, 2008 Page 386 of 458
REJ09B0250-0200
Figure 19.5 FMR0 Register
Flash Memory Control Register 0
Symbol Address After Reset
FMR0
01B7h 00000001b
Bit Symbol Bit Name Function RW
RY/BY
_
___
status flag
NOTES:
1.
2.
3.
4.
5.
6.
FMR07
b3 b2 b1 b0
—
(b5-b4)
FMR00
FMSTP
FMR02
0 : Disables rew rite
1 : Enables rew rite
Flash memory stop bit
(3,5)
0 : Enables flash memory operation
1 : Stops flash memory
(Enters low -pow er consumption state
and flash memory is reset)
FMR01
Block 0, 1, 2, 3 rew rite enable
bit
(2,6)
0 : Busy (During w riting or erasing)
1 : Ready
CPU rew rite mode select bit
(1)
b7 b6 b5 b4
RO
00
Reserved bit Set to 0
RW
0 : Completed successfully
1 : Terminated by error
RW
RO
RO
RW
RW
0 : CPU rew rite mode disabled
1 : CPU rew rite mode enabled
When setting the FMR01 bit to 0 (CPU rew rite mode disabled), the FMR02 bit is set to 0 (disables rew rite).
This bit is set to 0 by executing the clear status command.
This bit is enabled w hen the FMR01 bit is set to 1 (CPU rew rite mode enabled). When the FMR01 bit is set to 0 and
w riting 1 to the FMSTP bit, the FMSTP bit is set to 1. The flash memory does not enter low -pow er consumption stat
FMR06
When setting this bit to 1, set to 1 immediately after setting it first to 0. Do not generate an interrupt betw een setting
the bit to 0 and setting it to 1. Enter read array mode and set this bit to 0.
Set this bit to 1 immediately after setting this bit first to 0 w hile the FMR01 bit is set to 1.
Do not generate an interrupt betw een setting the bit to 0 and setting it to 1.
Set this bit by a program transferred to the RAM.
Program status flag
(4)
0 : Completed successfully
1 : Terminated by error
Erase status flag
(4)

Renesas R8C/20 Specifications

General

Brand	Renesas
Model	R8C/20
Category	Control Unit
Language	English