R8C/20 Group, R8C/21 Group 7. Programmable I/O Ports
Rev.2.00 Aug 27, 2008 Page 53 of 458
REJ09B0250-0200
X: 0 or 1
NOTE:
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
X: 0 or 1
NOTE:
1. Pulled up by setting the PU03 bit in the PUR0 register to 1.
X: 0 or 1
NOTE:
1. Pulled up by setting the PU04 bit in the PUR0 register to 1.
Table 7.18 Port P1_6/CLK0
Register PD1 U0MR
Function
Bit PD1_6 SMD2 SMD1 SMD0 CKDIR
Setting
value
0
Other than 001b X
Input port
(1)
XXX1
1 Other than 001b X Output port
0 X X X 1 CLK0 (external clock) input
X 0 0 1 0 CLK0 (internal clock) output
Table 7.19 Port P1_7/TRAIO/INT1
Register PD1 TRAIOC TRAMR INTEN
Function
Bit PD1_7 TIOSEL TOPCR TMOD2 TMOD1 TMOD0 INT1EN
Setting
value
0
0XXXX
X
Input port
(1)
X1XXX
X X Other than 001b
1
1XXXX
X Output portX1XXX
X X Other than 001b
0 0 X Other than 001b X TRAIO input
0 0 X Other than 001b 1
TRAIO/INT1
input
X 0 0 0 0 1 X TRAIO pulse output
Table 7.20 Port P2_0/TRDIOA0/TRDCLK
Register PD2 TRDOER1 TRDFCR TRDIORA0
Function
Bit PD2_0 EA0 CMD1 CMD0 STCLK PWM3 IOA2 IOA1 IOA0
Setting
value
0 1 XXXXXXX
Input port
(1)
1 1 X X X X X X X Output port
0 X 0 0 0 1 1 X X Timer mode (input capture function)
0 X XX1 1000External clock input (TRDCLK)
X 0 0 0 0 0 X X X PWM3 mode waveform output
X00001
001
Timer mode waveform output
(output compare function)
01X
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