SMIQ Digital Standard 3GPP W-CDMA (FDD)
1125.5555.03 E-92.205
Parameters in the DPCCH + DPDCH mode:
Fig. 2-122 DIGITAL STD – WCDMA/3GPP – MS CONFIGURATION: DPCCH + DPDCH Mode menu
--------------------------DPCCH Settings--------------------------------------------------------------------------
POWER
Channel power of the DPCCH, value range –60 to 0 dB
IEC/IEEE-bus command :SOUR:W3GP:MST2:DPCC:POW –3
TIMING OFFSET
For the DPCCH (together with the DPDCHs), a fixed timing offset of 1024 chips
(= 4 * 256 chips) is specified as standard. It is only displayed here and cannot be
changed.
IEC/IEEE-bus command :SOUR:W3GP:MST2:DPCC:TOFF?
SLOT FORMAT
Setting the TFCI STATE and FBI MODE parameters according to the following
table :
SLOT FORMAT TFCI STATE FBI MODE
0ONOFF
1OFFOFF
2 ON 1bit
3 OFF 1bit
4 OFF 2bits
5 ON 2bits
TFCI STATE
ON The TFCI field is used in the frame.
IEC/IEEE-bus :SOUR:W3GP:MST1:DPCC:TFCI:STAT ON
OFF The TFCI field is not used in the frame.
IEC/IEEE-bus :SOUR:W3GP:MST2:DPCC:TFCI:STAT OFF
Note: Any changes of this parameter will affect the SLOT FORMAT
parameter (see table under SLOT FORMAT).
TFCI
Setting the TFCI value in the range 0 to 1023. A combination of 30 bits is
selected by this value. This combination is distributed over 15 successive slots
in groups of two.
IEC/IEEE-bus command :SOUR:W3GP:MST4:DPCC:TFCI 21
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