Digital Standard 3GPP W-CDMA (FDD) SMIQ
1125.5555.03 E-92.220
Fig. 2-133 Signal consisting of P-CCPCH, P-SCH and S-SCH in time domain
The above diagram reveals that a time slot consists of 2560 chips and the power is higher with the first
10% of the signal. This is the SCH. Zooming in on this transition point reveals the following:
Fig. 2-134 Signal consisting of P-CCPCH, P-SCH and S-SCH in time domain (zoomed)
The right section (i.e. the 9 PCCPCH symbols) is spread as described in Fig. 2-90. You can see that for
each symbol clock one of the two components is 0 and the other one ±2 (a certain inaccuracy results
from the root cosine filter used).
This is the standard spreading scheme as it is also used for S-CCPCH, DPCH and all other downlink
channel types.
The left section (the synchronization code symbol occupying the chip range 0 to 255) is obtained using
special synchronization code spreading: there is no scrambling unit ( S
i
= C
i ,
S
q
= C
q
).
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