EasyManua.ls Logo

SBC PCD7.LR P5 Series - CPU Properties

SBC PCD7.LR P5 Series
137 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Hardware manual PCD7.LRxx-PG5 room controller │ Document 27-653; version ENG07 │ 2019-03-21
Saia-Burgess Controls AG
General technical details
Room controller/CPU
3-12
3
3.4 CPU properties
Properties PCD7.LRxx
General characteristics
Max. number of inputs/outputs up to 24
Processor
Cortex M4

Can be downloaded from
Saia PG5
®
environment
Programmable with Saia PG5
®
from V2.3.100
User program/DB/TEXT (FLASH) 128 kB
Main memory/DB/TEXT (RAM) 10 kB
 
Hardware clock
1)
Hardware clock accuracy Deviation of less than 1 min/month
󰀨
1)
max. 72 h
Interfaces
Programming interface Micro-USB type B
2)
Ports 0 + 1 RS-485, up to 115 kbit/s
Sylk Bus
Fieldbus connections on Ports 0 + 1
Serial S-Net
Modbus
If PCD7.LRxx-P5 acts as an S-Bus client, max. number of
E-Line slaves that can be connected
10 E-Line slaves
If PCD7.LRxx-P5 acts as an S-Bus or Modbus server: max.
number of PCD7.LRxx-P5 that can be connected to the
RS485 port, per segment, without repeater
128 PCD7.LRxx-P5
 󰀨
 

Table of Contents

Related product manuals