Siemens SIMATIC S5-95F - Page 203

S5-95F STEP 5 Operations
Stored On-Delay and Reset
Example: Output Q 1.0 is set 5 s after I 0.0.
Further changes in the signal state at input I 0.0 do not affect the output.
Input I 0.1 resets timer T 4 to its initial value and sets output Q 1.0 to zero.
a a a a a a a a a
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I 0.1
Q 1.0
LAD
Circuit Diagram
STL CSF
A I 0.0
L KT 500.0
SS T 4
A I 0.1
RT4
NOP 0
NOP 0
AT4
= Q 1.0
Timing Diagram
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I 0.0
KT 500.0
Q 1.0
T s
TV BI
DE
RQ
T 4
I 0.0
T s
TV BI
DE
RQ
T 4
5 5
I 0.0
I 0.1
1
0
1
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1
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Signal states
Time in s
Q 1.0
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T 4
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I 0.1
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I 0.1
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H 1
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H 1
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H 1
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H 1: Auxiliary relay
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KT 500.0
EWA 4NEB 812 6210-02 8-23