TM9100 Service Manual Description 45
© Tait Electronics Limited August 2005
Software Start-Up
When the radio is turned on, the following processes are carried out on the
main board:
Note This process describes the normal software start-up into normal
radio operation mode.
1. The FPGA image, which includes the RISC processor and the cus-
tom logic, is loaded from the serial flash to the FPGA.
2. The RISC processor executes the boot code, which carries out an
initialization and auto-calibration, and—in case of a fault—generates
an error code for display on the control head.
3. Normal radio operation starts with:
â– the RISC processor executing the radio application code,
including application software for the analog and/or digital modes
â– the DSP executing the DSP code for processing of digital signals
in analog and digital mode
â– the custom logic executing additional digital signal processing
Figure 2.11 Software architecture
FPGA
SRAM
Dynamic
Memory
FPGA Image
RISC Proc.
Control-HeadApplication Code
FPGA Image
Boot Code
Serial
Flash
Database
Boot Code
Flash
Memory
Application Code
FPGA
RadioApplication
Code
Serial Flash
RadioApplication Code
Custom Logic
Additional Digital
Signal Processing
FPGA Image
FPGA Image
RISC Processor
Boot Code
DSP
DSP Code
Flash Memory
Boot Code
Database
DSP Code
SRAM
Dynamic Memory