Theory of
Operation-2445A/2455A
Service
amplifier hybrid to the crt installed
in
the instrument. The
Dynamic Centering circuit sinks
an
intensity-dependent
correction current away from the vertical centering input at
pin
39. The correction signal holds the vertical centering
stable over a wide range of varying display intensities.
Readout jitter adjustment pot R618
is
used to minimize
thermal distortion
in
the output amplifier to reduce jitter
in
the
display readout.
The vertical output signal at pins 28
and
33
of U600
(OUT A
and
OUT
B)
is applied to the vertical deflection
plates of the crt (diagram
8)
via
L628
and
L633. The
deflection plates form a distributed-deflection structure
that
is
terminated
by
a hybrid resistor network.
One
ele-
ment of the terminating network is
an
adjustment poten-
tiometer used to match the network impedance to that of
the crt.
BANDWIDTH LIMITING. Bandwidth limiting coils L644
and
L619, along with capacitors built into U600, form a
three-pole filter used to roll off high-frequency response of
the Vertical Output amplifier above
20
MHz. To limit the
vertical bandwidth, the BWL (bandwidth limit) input to
U600
(pin
16) is pulled
LO.
It may
be
set
LO
either
by
the
BWL control data bit from Auxiliary Control Register U140
(diagram
4)
when the operator selects the Bandwidth Limit
feature or automatically
by
the output of NANO-gate
U975A
in
the Vertical Channel Switch circuitry
(via
CR616)
when the readout
is
being displayed.
TRACE SEPARATION. The voltage applied to the TS
(trace separation) input of U600
(pin
42)
is
used
to offset
the output levels
to
vertically shift the position of the trace
on
the crt. During normal sweep displays,
TS1
+ TS2
signal applied to the base of
0600
by
the Display
Sequencer (diagram
5)
is
HI,
and
the transistor is turned
on. The TRACE SEP
level
at the junction of
R642
and
CR600 is shunted
to
ground,
and
no offsetting at the
output signal will occur.
For
those displays
in
which trace
separation should occur, the Display Sequencer switches
the base of
0600
to ground level to turn off the transistor.
The
trace separation
level
set
by
front-panel TRACE
SEP
control R3190 (via MUX U2530
and
sample-and-hold
circuit U2630C
and
C2631) is applied
to
the
TS
input of
U600,
and
a corresponding offset of the displayed trace
will occur.
BEAM FIND. As
an
aid
in
locating off-screen or
overscanned displays, the instrument
is
provided with a
beam-finding feature. When the front-panel BEAM FIND
button
is
pushed, the beam-find input
pin
(BF,
pin
15)
of
U600 will
be
pulled
HI.
While
BF
is
HI,
the dynamic range
of
Vertical Output Amplifier U600
is
reduced,
and
all
deflected traces will
be
held
to within the vertical limits of
the crt graticule.
3-24
Also, the activation of the BEAM
FIND
switch is
detected
by
the microprocessor during its normal Front-
Panel
Switch Scanning. When detected, the generates a
User Request SRO if option
10
is
installed.
OUTPUT PROTECTION CIRCUIT. A current-limit circuit
composed of transistors
0623
and
0624
protects the
Vertical Output Amplifier from a short-circuited output or a
bias-loss condition. Either of these fault conditions will
cause excessive current
to
flow into pins 30
and
31
of
U600. Current
in
FET
0624
is
limited to the IDSS current,
so the voltage at pins 24, 30 and
31
will drop. This
decreases the forward bias
on
pass-transistor
0623
and
lowers the voltage at pin 23 of U600 enough
to
provide
some degree of protection tor the device.
Horizontal Amplifier
The Horizontal Amplifier circuitry consists
of
a Horizon-
tal Output Amplifier U800, a unity-gain buffer amplifier
made
up
of the five transistors
in
U735,
and
associated
components.
UNITY-GAIN BUFFER AMPLIFIER. The amplifier circuit
composed of U735A,
B,
C,
D,
and
E along with their
associated components, form a unity-gain amplifier that
buffers the ramp signal from A Sweep Generator U700 to
the Horizontal Output Amplifier. Transistors U735C
and
D
form a differential pair with the negative excursion of their
emitters limited to
-5
V (clamped
by
U735E). Negative
feedback from the collector of U735C to its base
is
via
emitter-followers U735A
and
B
(in
parallel) which drive the
A Sweep input
(pin
18,
A+)
of Horizontal Output Amplifier
U800.
HORIZONTAL OUTPUT AMPLIFIER. Integrated circuit
U800 provides
the
final amplification of the selected
horizontal-deflection signal required to drive the crt.
One
of
the single-ended input signals applied
to
the four input pins
is
converted to a differential-output signal at the output
pins of the amplifier. The four deflection signals to U800
are: the A sweep
(pin
18,
A+),
the B Sweep
(pin
16,
B +
),
the Readout Horizontal signal (pin
17
,
RO)
and
the
Channel 1 signal (used for horizontal deflection of the
X-Y
displays) at
pin
20,
the
X+
input pin. Signal selection is
done
by
an
internal channel switch
and
is
controlled
by
the
HSA (ho
(horizontal select
A)
and HSB (horizontal select
B)
signals from the Display Sequencer (see Table 3-4).
Switching between unmagnified
(X1)
gain
and
magnified
(X10 gain) is also controlled
by
signals from the Display
Sequencer. For normal horizontal deflection, the
MAG
sig-
nal
on
pin
14 of U800
is
HI,
and
the gain of the output
amplifier produces normal sweep deflection. Precise
X1
deflection gain
is
set
by
adjusting
X1
Gain
pot R860.
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