Toradex Verdin - Verdin Bottom Side Signal Definitions (ADC, I2 C, PWM, CAN, I2 S, QSPI, SDIO)

Verdin Carrier Board Design Guide
Preliminary – Subject to Change
Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
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6 Appendix B – Module Bottom Side Signal Definition
Pin Number
Signal Group
Signal Name
Signal Type
Feature Group
2
ADC
ADC_1
Analog Input 1.8V
"Reserved"
4
ADC_2
Analog Input 1.8V
"Reserved"
6
ADC_3
Analog Input 1.8V
"Reserved"
8
ADC_4
Analog Input 1.8V
"Reserved"
10
GND
12
I2C
I2C_1_SDA
Open Drain 1.8V
"Always Compatible"
14
I2C_1_SCL
Open Drain 1.8V
"Always Compatible"
16
PWM
PWM_2
Output 1.8V
"Reserved"
18
CAN
GND
20
CAN_1_TX
Output 1.8V
"Reserved"
22
CAN_1_RX
Input 1.8V
"Reserved"
24
CAN_2_TX
Output 1.8V
"Reserved"
26
CAN_2_RX
Input 1.8V
"Reserved"
28
I2S
GND
30
I2S_1_BCLK
Bidirectional 1.8V
"Reserved"
32
I2S_1_SYNC
Bidirectional 1.8V
"Reserved"
34
I2S_1_D_OUT
Output 1.8V
"Reserved"
36
I2S_1_D_IN
Input 1.8V
"Reserved"
38
I2S_1_MCLK
Output 1.8V
"Reserved"
40
GND
42
I2S_2_BCLK
Bidirectional 1.8V
"Reserved"
44
I2S_2_SYNC
Bidirectional 1.8V
"Reserved"
46
I2S_2_D_OUT
Output 1.8V
"Reserved"
48
I2S_2_D_IN
Input 1.8V
"Reserved"
50
QSPI
GND
52
QSPI_1_CLK
Output 1.8V
"Reserved"
54
QSPI_1_CS#
Output 1.8V
"Reserved"
56
QSPI_1_IO0
Bidirectional 1.8V
"Reserved"
58
QSPI_1_IO1
Bidirectional 1.8V
"Reserved"
60
QSPI_1_IO2
Bidirectional 1.8V
"Reserved"
62
QSPI_1_IO3
Bidirectional 1.8V
"Reserved"
64
QSPI_1_CS2#
Output 1.8V
"Reserved"
66
QSPI_1_DQS
Output 1.8V
"Reserved"
68
SDIO
GND
70
SD_1_D2
Bidirectional 3.3V/1.8V
"Always Compatible"
72
SD_1_D3
Bidirectional 3.3V/1.8V
"Always Compatible"
74
SD_1_CMD
Bidirectional 3.3V/1.8V
"Always Compatible"
76
SD_1_PWR_EN
Output 3.3V/1.8V
"Always Compatible"
78
SD_1_CLK
Output 3.3V/1.8V
"Always Compatible"
80
SD_1_D0
Bidirectional 3.3V/1.8V
"Always Compatible"
82
SD_1_D1
Bidirectional 3.3V/1.8V
"Always Compatible"