Toradex Verdin - Verdin Physical Pin Definitions and Locations

Verdin Carrier Board Design Guide
Preliminary – Subject to Change
Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
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7 Appendix C - Physical Pin Definition and Location
Signal Group
Module Top Side
MXM3 Pins
Module Bottom Side
Signal Group
JTAG
JTAG_1_TDI
1
2
ADC_1
ADC
JTAG_1_TRST#
3
4
ADC_2
JTAG_1_TDO
5
6
ADC_3
JTAG_1_VREF
7
8
ADC_4
JTAG_1_TCK
9
10
GND
GND
11
12
I2C_1_SDA
I2C
JTAG_1_TMS
13
14
I2C_1_SCL
PWM
PWM_1
15
16
PWM_2
PWM
DSI
GPIO_9_DSI
17
18
GND
CAN
PWM_3_DSI
19
20
CAN_1_TX
GPIO_10_DSI
21
22
CAN_1_RX
DSI_1_D3_N
23
24
CAN_2_TX
DSI_1_D3_P
25
26
CAN_2_RX
GND
27
28
GND
I2S
DSI_1_D2_N
29
30
I2S_1_BCLK
DSI_1_D2_P
31
32
I2S_1_SYNC
GND
33
34
I2S_1_D_OUT
DSI_1_CLK_N
35
36
I2S_1_D_IN
DSI_1_CLK_P
37
38
I2S_1_MCLK
GND
39
40
GND
DSI_1_D1_N
41
42
I2S_2_BCLK
DSI_1_D1_P
43
44
I2S_2_SYNC
GND
45
46
I2S_2_D_OUT
DSI_1_D0_N
47
48
I2S_2_D_IN
DSI_1_D0_P
49
50
GND
QSPI
GND
51
52
QSPI_1_CLK
I2C_2_DSI_SDA
53
54
QSPI_1_CS#
I2C_2_DSI_SCL
55
56
QSPI_1_IO0
HDMI
I2C_3_HDMI_SDA
57
58
QSPI_1_IO1
I2C_3_HDMI_SCL
59
60
QSPI_1_IO2
HDMI_1_HPD
61
62
QSPI_1_IO3
HDMI_1_CEC
63
64
QSPI_1_CS2#
GND
65
66
QSPI_1_DQS
HDMI_1_TXC_N
67
68
GND
SDIO
HDMI_1_TXC_P
69
70
SD_1_D2
GND
71
72
SD_1_D3
HDMI_1_TXD0_N
73
74
SD_1_CMD
HDMI_1_TXD0_P
75
76
SD_1_PWR_EN
GND
77
78
SD_1_CLK
HDMI_1_TXD1_N
79
80
SD_1_D0
HDMI_1_TXD1_P
81
82
SD_1_D1