1 Introduction................................................................................................................... 6
1.1 Overview ........................................................................................................................ 6
1.2 Additional Documents ...................................................................................................... 6
1.2.1 Layout Design Guide ............................................................................................. 6
1.2.2 Verdin Module Datasheets ..................................................................................... 6
1.2.3 Verdin Module Definition ........................................................................................ 6
1.2.4 Toradex Developer Center ..................................................................................... 6
1.2.5 Verdin Reference Designs ...................................................................................... 7
1.2.6 Pinout Designer .................................................................................................... 7
1.3 Abbreviations .................................................................................................................. 7
2 Interfaces .................................................................................................................... 10
2.1 Architecture .................................................................................................................. 10
2.1.1 "Always Compatible" Interfaces ............................................................................. 11
2.1.2 "Reserved" Interfaces .......................................................................................... 12
2.1.3 "Module-specific" Interfaces.................................................................................. 13
2.1.4 Pin Numbering .................................................................................................... 13
2.2 PCI Express ................................................................................................................. 15
2.2.1 PCIe Signals....................................................................................................... 15
2.2.2 Reference Schematics ......................................................................................... 15
2.2.3 Unused PCIe Signals Termination ......................................................................... 21
2.3 Ethernet ....................................................................................................................... 21
2.3.1 Media Dependent Ethernet Port ............................................................................ 21
2.3.2 Reduced Gigabit Media-Independent Interface Ethernet Port.................................... 24
2.4 USB ............................................................................................................................. 25
2.4.1 USB Signals ....................................................................................................... 26
2.4.2 Reference Schematics ......................................................................................... 27
2.4.3 Unused USB Signal Termination ........................................................................... 32
2.5 HDMI/DVI ..................................................................................................................... 33
2.5.1 HDMI/DVI Signals ............................................................................................... 33
2.5.2 Reference Schematics ......................................................................................... 33
2.5.3 Unused HDMI/DVI Signal Termination ................................................................... 35
2.6 Display Serial Interface (MIPI DSI) .................................................................................. 35
2.6.1 MIPI DSI Signals ................................................................................................. 36
2.6.2 Reference Schematics ......................................................................................... 36
2.6.3 MIPI DSI Display Adapters ................................................................................... 39
2.6.4 Unused MIPI DSI Signal Termination ..................................................................... 42
2.7 Camera Serial Interface (MIPI CSI-2) ............................................................................... 42
2.7.1 MIPI CSI-2 Signals .............................................................................................. 43
2.7.2 Reference Schematics ......................................................................................... 43
2.8 SD/MMC/SDIO.............................................................................................................. 44
2.8.1 SD/MMC/SDIO Signals ........................................................................................ 44
2.8.2 Reference Schematics ......................................................................................... 44
2.8.3 Unused SD/MMC/SDIO Interface Signal Termination .............................................. 45
2.9 I
2
C ............................................................................................................................... 45
2.9.1 I
2
C Signals ......................................................................................................... 46
2.9.2 Reference Schematics ......................................................................................... 46
2.9.3 Unused I
2
C Signal Termination ............................................................................. 46
2.10 UART........................................................................................................................... 46
2.10.1 UART Signals .................................................................................................. 47
2.10.2 Reference Schematics ...................................................................................... 47
2.10.3 Unused UART Signal Termination ...................................................................... 49
2.11 SPI .............................................................................................................................. 49
2.11.1 SPI Signals ..................................................................................................... 50