Toradex Verdin - Verdin MIPI DSI Interface

Verdin Carrier Board Design Guide
Preliminary – Subject to Change
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2.5.3 Unused HDMI/DVI Signal Termination
All unused HDMI/DVI signals can be left unconnected.
Verdin
Pin
Verdin
Signal Name
Recommended Termination
69
HDMI_1_TXC_P
Leave NC if not used
67
HDMI_1_TXC_N
Leave NC if not used
75
HDMI_1_TXD0_P
Leave NC if not used
73
HDMI_1_TXD0_N
Leave NC if not used
81
HDMI_1_TXD1_P
Leave NC if not used
79
HDMI_1_TXD1_N
Leave NC if not used
87
HDMI_1_TXD2_P
Leave NC if not used
85
HDMI_1_TXD2_N
Leave NC if not used
63
HDMI_1_CEC
Add pull-up resistor or disable the CEC function in software
61
HDMI_1_HPD
Add pull-up resistor or disable the HDMI function in software
57
I2C_3_HDMI_SDA
Add pull-up resistor or disable the I2C function in software
59
I2C_3_HDMI_SCL
Add pull-up resistor or disable the I2C function in software
Table 13: Unused HDMI/DVI signal termination
2.6 Display Serial Interface (MIPI DSI)
The Digital Serial Interface (DSI) is specified by the Mobile Industry Processor Interface Alliance
(MIPI) and is available as "Reserved" interface on the Verdin module specifications. The interface
targets to connect high resolution displays with low energy consumption. The interface is intended
to be used for internal displays with shorter cable length.
The interface consists of a differential pair bit clock and between one and four differential data
signal lanes. While the data lanes 1 to 3 are traveling from the module to the display, the lane 0 is
bidirectional. This lane is capable of a bus turnaround (BTA) for commands. In the low power
mode, the separate clock signal is disabled. The clock is then embedded into the data lanes.
However, image data can only be sent in the high-speed mode which uses also the external clock
signal.