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Toradex Verdin - Page 48

Toradex Verdin
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Verdin Carrier Board Design Guide
Preliminary Subject to Change
Toradex AG l Ebenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com
Page | 48
Figure 39: RS232 Reference Schematic
2.10.2.2 RS422 Reference Schematics
The RS422 is a full-duplex serial interface with differential pair signals. This allows higher data
rates over longer distances as with the RS232. Since the RS422 has separate RX and TX signal
pairs, no additional control signals are required for changing the signal direction. This means, the
RS422 requires only the RX and TX signals of the UART interface. Therefore, it is possible to use any
of the four standard UART interfaces of the Verdin standard.
The RS422 specification does not contain a connector. Therefore, there is no standard connector
for this interface available. The reference schematic below uses the 9-pin D-sub connector (DE-9).
Peripherals might have a different pin-out even if they use a DE-9 connector as well.
Figure 40: RS422 Reference Schematic
2.10.2.3 RS485 Reference Schematics
The RS485 interface is a half-duplex serial interface with differential pair signals. Instead of two
differential pair wires (RS422), only one pair is used for transmitting and receiving the data. The
bus allows Multi-Point connections. Since the transceiver needs to be set either in the transmitting
or receiving mode, an additional control signal is required. It is recommended to use the RTS signal
of the corresponding UART interface. The RTS signal is only available on the UART_1 and UART_2
as Verdin standard interface. The schematic shown below inverts the RTS signal for the data enable
input of the transceiver. Some modules allow inverting the signal in software, but it is
recommended to keep the inverter circuit in in the RTS signal to maintain compatibility with
different modules and drivers provided by Toradex. For some applications, it is desirable that the
UART controller does not see the TX message on its RX pins (echo of the sent message). In this
case, the receive enable pin (RE#) can be driven as well with the RTS signal. This turns off the RX
output buffer during sending a message.
RIN1
3
RIN2
4
DOUT1
5
DOUT2
6
DIN2
9
DIN1
10
ROUT2
11
ROUT1
12
IC38A
TRS3122ERGER
C3+
1
C3-
2
NC
7
NC
8
INVALID
13
FORCEOFF
14
FORCEON
15
C1-
16
GND
17
VL
18
VCC
19
V+
20
C1+
21
C2+
22
C2-
23
V-
24
GND-TH
25
IC38B
TRS3122ERGER
1
2
3
4
5
6
7
8
9
A-DS 09 A/KG-T4S
X51A
S1
S2
SHIELD
A-DS 09 A/KG-T4S
X51B
GND
1nF
2KV
C244
GND_CHASSIS
GND
RS232_RTS
RS232_TXD
RS232_RXD
RS232_CTS
RS232_RTS
RS232_TXD
RS232_RXD
RS232_CTS
100nF
16V
C246
GND
100nF
16V
C242
100nF
16V
C241
100nF
16V
C245
100nF
16V
C247
100nF
16V
C248
100nF
16V
C243
GND
GND
+V1.8_SW
UART_1_RXD
129
UART_1_TXD
131
UART_1_RTS
133
UART_1_CTS
135
UART_2_RXD
137
UART_2_TXD
139
UART_2_RTS
141
UART_2_CTS
143
X1F
2309409-2
GND
RS232
1M
R304
+V3.3_SW
UART_1_TXD
UART_1_RTS
UART_1_RXD
UART_1_CTS
+V1.8_SW
+V1.8_SW
UART_1_TXD
UART_1_RTS
UART_1_RXD
UART_1_CTS
ADM3491ARZ
Rx+
12
Rx-
11
Tx-
10
Tx+
9
NC
1
RO
2
nRE
3
DE
4
DI
5
GND
6
GND
7
NC
8
VCC
13
VCC
14
IC4
DE
RE#
100nF
16V
C41
GND
UART2_RS422_TXD+
UART2_RS422_TXD-
UART2_RS422_RXD-
UART2_RS422_RXD+
GND
UART2_RS422_RXD-
UART2_RS422_RXD+
UART2_RS422_TXD+
UART2_RS422_TXD-
R57
120R
1
2
3
4
5
6
7
8
9
1734351-1
X55A
+V3.3_SW
+V3.3_SW
GND
UART3_RXD
UART3_TXD
GND
UART_1_RXD
129
UART_1_TXD
131
UART_1_RTS
133
UART_1_CTS
135
UART_2_RXD
137
UART_2_TXD
139
UART_2_RTS
141
UART_2_CTS
143
X1F
2309409-2
SN74AVC4T774RSVR
VCCA
14
OE
7
VCCB
13
A4
4
A1
1
A2
2
A3
3
GND
8
B3
10
B2
11
B1
12
B4
9
DIR1
15
DIR2
16
DIR3
5
DIR4
6
IC3
C39
100nF
16V
C38
+V3.3_SW
+V1.8_SW
+V1.8_SW
+V1.8_SW
GND
GND
0
DIRx Direction
A <= B
1 A => B
GND
GND
+V1.8_SW
GND GND

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