EasyManua.ls Logo

Vaisala RVP900

Vaisala RVP900
512 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Chapter 7 __________________________________________________ Host Computer Commands
VAISALA______________________________________________________________________ 335
boundaries themselves. This convention makes it simpler to define several
contiguous regions without generating slivers in between.
0916-181
0916-182
The following two arguments specify a trigger period in the same manner
as the optional form of the SETPWF command.
0916-183
7.32 Configure Target Simulator (TARGSIM)
The RVP900 contains a built-in target simulator tool that can test and
debug processing algorithms that work with multiple trip returns. Several
real physical targets can be simulated, each having a range span measured
in kilometers, a Doppler shift in Hertz, and an echo power relative to the
saturation level of the receiver. The echoes are placed in range exactly
according to how they have been illuminated by whatever sequence of
pulses have been transmitted so far. Multiple trip returns and range folding
are all modeled correctly.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Lower AZ (Binary angle) | Input 2
|_______________________________________________________________|
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Upper AZ (Binary angle) | Input 3
|_______________________________________________________________|
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Lower EL (Binary angle) | Input 4
|_______________________________________________________________|
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Upper EL (Binary angle) | Input 5
|_______________________________________________________________|
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Lower 16–Bits of 32–Bit Trigger Period in Nanoseconds | Input 6
|_______________________________________________________________|
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
| | | | | | | | | | | | | | | | |
| Upper 16–Bits of 32–Bit Trigger Period in Nanoseconds | Input 7
|_______________________________________________________________|
.

Table of Contents

Other manuals for Vaisala RVP900